The present invention relates to a semiconductor apparatus, and for example, a semiconductor apparatus including a trench power transistor.
Development of a CSP (Chip Size Package) MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) for lithium ion (Li+) battery protection (EFLIP: Ecologically Flip chip MOSFET for Lithium-Ion battery Protection) has been proceeding. As such a MOSFET, a one-chip dual MOSFET structure in which a drain electrode formed of a metal plate or a metal film is placed on a back surface is well known (Published Japanese Translation of PCT International Publication for Patent Application, No, 2004-502293, Japanese Patent No. 3917144, and Japanese Patent Application No. 2012-121503).
In a semiconductor apparatus disclosed in Published Japanese Translation of PCT International Publication for Patent Application, No. 2004-502293, a chip is partitioned into four areas, and FETs 1 and FETs 2 are alternately arranged. The FET 1 and FET 2 are in U-shapes, and the FET 1 and FET 2 are engaged with each other. Gate pads G1 and G2 of the FET 1 and FET 2 are formed within the areas of their respective FETs 1 and 2, at opposed corners of the chip.
Japanese Patent No. 3917144 discloses a one-chip dual MOSFET structure in which more number of MOS1 areas and MOS2 areas than they are in the Published Japanese Translation of PCT International Publication for Patent Application, No. 2004-502293 are alternately arranged, and gate pads G1 and G2 are disposed on one side of the chip.
Japanese Patent Application No. 2012-121503 discloses a semiconductor apparatus including a semiconductor chip that is partitioned into three areas, which are a first area, a second area, and a third area, and a common drain electrode that is disposed on a back surface of the semiconductor chip. Further, in the semiconductor apparatus disclosed in Japanese Patent Application No. 2012-121503, the second area is formed between the first area and the third area, first MOSFETs are formed in the first area and the third area, and a second MOSFET is formed in the second area.